Ferroelectric thin films of high crystalline quality have recently been grown on silicon substrates using suitable combinations of buffer layers and templates to initiate the crystallization and formation of the desired material phase in a proper crystallographic orientation. For example, yttria-stabilized zirconia (YSZ) has been used as a buffer layer on a chemically cleaned [100] Si wafer to provide a crystalline template for the growth of subsequent layers of cuprate superconductors, such as yttrium-barium-cuprate (YBCO). In U.S. Pat. No. 5,155,658, a high crystalline quality, c-axis oriented YBCO was used as a structural template for subsequent growth of a pseudo-cubic lead zirconium titanate (PZT) perovskite ferroelectric layer and a covering YBCO electrode layer to yield a ferroelectric memory element. High growth temperatures presented a problem in Si-CMOS processing, however.
Improved, lower temperature crystalline growth was later achieved with cubic metal oxides, such as lanthanum-strontium-cobalt oxide (LSCO), employing a layered perovskite, e.g., bismuth titanate (BTO), template layer to initiate c-axis orientation in LSCO and PZT ferroelectric overlayers, as described in U.S. Pat. No. 5,270,298. Further improvement in the growth of ferroelectric devices was realized in U.S. Pat. No. 5,248,564 through the use of lead-lanthanum-zirconium-titanate (PLZT) in a LSCO/PLZT/LSCO heterostructure which could be compatibly formed on a CMOS SiO/Si substrate by means of the layered BTO, or similar bismuth tungstate (BWO), template.
Although the temperature limitations had thus been surmounted and CMOS compatibility achieved, the electrical conductivity of the heterostructure on a SiO.sub.2 /Si substrate was insufficient for effective integrated circuit application. By means of the present invention, however, this shortcoming has been remedied and the ferroelectric heterostructure materials have been improved further through controlled crystal growth processing.